A 2-D/3-D Schrödinger-Poisson Drift-Diffusion Numerical Simulation of Radially-Symmetric Nanowire MOSFETs

نویسندگان

  • Daniela Munteanu
  • Jean-Luc Autran
چکیده

The phenomenal success of CMOS technology, and, then the progress of the information technology, can be attributed without any doubt to the scaling of the MOS transistor, which has been pushed during more than thirty years to increasingly levels of integration and per‐ formances. Then, MOSFETs have been fabricated always smaller, denser, faster and cheaper in order to provide ever more powerful products for digital electronics. Recently, the scaling rate has accelerated, and the MOSFET gate length is now less than 40 nm, with devices en‐ tering into the nanometer world [1]-[2]. The so-called “bulk” MOSFET is the basic and his‐ torical key-device of microelectronics: its dimensions have been reduced more than ~103 times during the three past decades. However, the bulk MOSFET scaling has recently en‐ countered significant limitations, mainly related to the gate oxide (SiO2) leakage currents [3][4], the large increase of parasitic short channel effects and the dramatic mobility reduction [5]-[6] due to highly doped Silicon substrates precisely used to reduce these short channel effects. Technological solutions have been proposed in order to continue to use the “bulk solution” until the 45 nm ITRS node. Most of these solutions envisage the introduction of high-permittivity gate dielectric stacks (to reduce the gate leakage, [4], [7]-[8]), midgap metal gate (to suppress the Silicon gate polydepletion-induced parasitic capacitances) and strained Silicon channel (to increase carrier mobility, [9]). However, in parallel to these efforts, alter‐ native solutions to replace the conventional bulk MOSFET architecture have been proposed and studied in the recent literature. These options are numerous and can be classified in general according to three main directions: (i) the use of new materials in the continuity of the “bulk solution”, allowing increasingly MOSFET performances due to their dielectric properties (permittivity), electrostatic immunity (SOI materials), mechanical (strain), or

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تاریخ انتشار 2012